AMD President and CEO Dr. Lisa Su took to Computex 2019 keynote where she announced 3rd Generation Ryzen processors, with main-stream flagship desktop processor called as Ryzen 9 3900X.
The Ryzen 9 3900X CPU houses 12 cores / 24 threads with base clock of 3.8GHz and boost clock speeds of 4.6GHz. It has TDP of 105W, 70MB total cache and PCIe4.0 lanes. It is priced at $499 and is expected to be available from July 7th, 2019.
The Ryzen 7 3800X CPU houses 8 cores / 16 threads with base clock of 3.9GHz and boost clock speeds of 4.5GHz. It has TDP of 105W, 36MB total cache and PCIe4.0 lanes. It is priced at $399 and is expected to be available from July 7th, 2019.
The Ryzen 7 3700X CPU houses 8 cores / 16 threads with base clock of 3.9GHz and boost clock speeds of 4.5GHz. It has TDP of 65W, 36MB total cache and PCIe4.0 lanes. It is priced at $329 and is expected to be available from July 7th, 2019.
The Ryzen 5 3600X CPU houses 6 cores / 12 threads with base clock of 3.8GHz and boost clock speeds of 4.4GHz. It has TDP of 95W, 35MB total cache and PCIe4.0 lanes. It is priced at $249 and is expected to be available from July 7th, 2019.
The Ryzen 5 3600 CPU houses 6 cores / 12 threads with base clock of 3.6GHz and boost clock speeds of 4.2GHz. It has TDP of 65W, 35MB total cache and PCIe4.0 lanes. It is priced at $199 and is expected to be available from July 7th, 2019.
Along with it, AMD also unveiled its new “Zen 2” core which outperforms the historical generational performance improvement industry trend, up to 15% estimated instructions per clock (IPC)2 uplift over the predecessor “Zen” architecture. The “Zen 2” CPU core powering the next-generation AMD Ryzen and EPYC™ processors also includes significant design improvements including lager cache sizes and a redesigned floating point engine.
Its new AMD X570 chipset for socket AM4 is also worlds first PCIe 4.0 supported chipset. It has 50 new motherboards at launch. Company also unveiled its new RDNA gaming architecture which noth only enhances performance but also power and memory efficiency.